Triaging Hard Float Disassembly

Anytime anyone tells you "I had to look at [arbitrary compiler] source today", that's a bad sign. It's like if someone told you they pooped today, what is so wrong that there was a need to notify you that they pooped???

Well, I had to look at gcc source, and it's because disassembler's don't support ARM FPv5 (note that gdb libopcode seem's to albeit associates this FPU version with ARMv8 - but at least there's that).

What is ARM FPv5 and why does this matter

For the STM32F746IE MCU (our target processor), the Playdate uses FPv5 single-precision floating point support, therefore there are fancy instructions that aren't supported that ruin all our disassembly.

Hard vs Soft Float

They do the same math, except Hard float is implemented in Hard ware, and Soft float is implemented in Soft ware. TLDR; Hard float is orders of magnitude faster, at the cost of higher power consumption and a more expensive MCU etc.

FPv5 Specification

Architecture Reference Manual - chapter 6 is The Floating-point Instruction Set Encoding

Floating Point Instructions

WTF are they doing at ARM (and can I have some)

Primer: ARM mode vs. Thumb Mode

Primer: What are FPU, VFP, ASE, NEON, MPE, SVE, SME, MVE, and VPU?

simd + neon + ase + mpe + vfp(v1 -> v5) + vfp11 + mve can u just not, plz and ty.

Straight to the (gcc) source

"why not just use the docs + libopcodes if they already support it"

Because sister, I have seen the beyond and I'm sick of the docs being different from real life. That and an incorrect lifter is worse than an absent lifter.

So, I'm going to use the thing that emits the actual code to add FPv5 support.

For science.

And because I hate myself.

Overview of gcc source tree

Source tree

  • Top Level docs: link
  • What we care about: link
    • specifically we want to know how a gcc backend is created (ie ARM)
    • note that a frontend is something like the C programming language, while the backend is a platform / mcu architecture

Overview of a gcc backend

GCC Backend docs

Of note: >A directory machine under gcc/config, containing a machine description machine.md file (see Machine Descriptions), header files machine.h and machine-protos.h and a source file machine.c (see Target Description Macros and Functions), possibly a target Makefile fragment t-machine (see The Target Makefile Fragment), and maybe some other files. The names of these files may be changed from the defaults given by explicit specifications in config.gcc.

We're mostly concerned with how instructions are emitted and what they look like, so we want to look at the machine descriptions.

Overview of ARM gcc backend

How does GCC do ARM FPv5

Next: FPv5 meet World